AT28HC64BF-12JU【PDF 1/16 页】IC EEPROM 64KBIT 120NS 32PLCC

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录313

[1页]2页 3页 4页 5页

Features

? Fast Read Access Time – 70 ns

? Automatic Page Write Operation

– Internal Address and Data Latches for 64 Bytes

? Fast Write Cycle Times

– Page Write Cycle Time: 2 ms Maximum (Standard)

– 1 to 64-byte Page Write Operation

Low Power Dissipation

– 40 mA Active Current

– 100 μA CMOS Standby Current

64K (8K x 8)

Hardware and Software Data Protection

DATA Polling and Toggle Bit for End of Write Detection

High Reliability CMOS Technology

– Endurance: 100,000 Cycles

– Data Retention: 10 Years

Single 5 V ± 10% Supply

CMOS and TTL Compatible Inputs and Outputs

JEDEC Approved Byte-wide Pinout

Industrial Temperature Ranges

Green (Pb/Halide-free) Packaging Only

High Speed

Parallel

EEPROM with

Page Write and

Software Data

Protection

1. Description

The AT28HC64BF is a high-performance electrically-erasable and programmable

read-only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8

AT28HC64BF

bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device

offers access times to 55 ns with power dissipation of just 220 mW. When the device

is deselected, the CMOS standby current is less than 100 μA.

The AT28HC64BF is accessed like a Static RAM for the read or write cycle without the

need for external components. The device contains a 64-byte page register to allow

writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to

64 bytes of data are internally latched, freeing the address and data bus for other

operations. Following the initiation of a write cycle, the device will automatically write

the latched data using an internal control timer. The end of a write cycle can be

detected by DATA polling of I/O7. Once the end of a write cycle has been detected, a

new access for a read or write can begin.

Atmel’s AT28HC64BF has additional features to ensure high quality and manufactura-

bility. The device utilizes internal error correction for extended endurance and

improved data retention characteristics. An optional software data protection mecha-

nism is available to guard against inadvertent writes. The device also includes an

extra 64 bytes of EEPROM for device identification or tracking.

3648B–PEEPR–4/09

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式